M31 Collaborates with TSMC to Tape Out eUSB2V2 on N2P Process, Strengthening Advanced Process Design IP Ecosystem

Hsinchu, April 23, 2026 /PRNewswire/ — M31 Technology Corporation, a global leader in silicon intellectual property (IP), today announced at the 2026 TSMC North America Technology Symposium that its eUSB2V2 interface IP has been taped out on TSMC’s N2P process. M31 stated that this achievement demonstrates the company’s commitment to advanced process interface IP, strengthens 2-nanometer generation designs, and supports customers in integrating high-speed, low-power connectivity interfaces into highly integrated SoCs.

M31 collaborates with TSMC to complete eUSB2V2 tapeout on N2P process, strengthening advanced process design IP ecosystem
M31 collaborates with TSMC to complete eUSB2V2 tapeout on N2P process, strengthening advanced process design IP ecosystem

As advanced nodes evolve, SoCs are moving toward higher computing density and stricter energy efficiency goals. I/O interfaces must not only meet high-speed transmission and compatibility requirements but also maintain robust signal quality and manufacturability under lower operating voltages and tighter power budgets. M31’s taped-out eUSB2V2 is co-optimized at the design, circuit, and layout levels specifically for the TSMC N2P platform, enhancing overall performance and power efficiency while balancing area utilization and system integration flexibility.

In terms of technical highlights, while maintaining compatibility with the existing USB 2.0 ecosystem, it supports 1.2V/0.9V low-voltage operation. By enhancing the analog front-end design, including the introduction of programmable transmit de-emphasis and receiver-side CTLE/VGA equalization techniques, it significantly improves transmission channel robustness and design flexibility in advanced processes. In terms of performance, the eUSB2V2 supports transmission rates up to 4.8 Gbps (HS10) and improves concurrent transmission efficiency through a new isochronous burst mechanism. It also supports asymmetric bandwidth HSUx/HSDx modes, achieving an excellent power consumption of 50mW in standard operating mode. Paired with the N2P process, it is particularly suitable for applications such as AI, HPC, and mobile devices that seek a balance between high performance and low power.

Commenting on this achievement on the N2P platform, M31 General Manager Chang Yuan-Hsun noted: 2-nanometer interface IP must align with the process platform to enhance design efficiency and accelerate time-to-market. He further shared: M31’s tapeout of the eUSB2V2 IP on TSMC’s N2P process is centered on a platform-oriented approach, helping customers more efficiently integrate key interfaces, shorten the timeline from design to production preparation, and strengthen the overall competitiveness of the 2-nanometer node.

M31 emphasized that this tapeout milestone was achieved through close collaboration with TSMC in advanced process IP development, including following platform design methodologies, tuning circuit and layout levels for process and I/O conditions, and aligning with platform design reference flows. IP verified on TSMC’s advanced nodes helps improve the efficiency of interface integration, system verification, and product schedule planning for M31 and TSMC’s mutual customers.

Looking ahead, M31 plans to extend the development experience from this 2-nanometer eUSB2V2 IP to more of TSMC’s advanced processes, continuing to support growth drivers such as AI, edge computing, and smart terminals, while enhancing the long-term value of the IP platform.

 

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